期刊文献+

总线型细胞阵列设计与空闲细胞选择方法 被引量:1

Design of bus-based embryonic array and selection method for mounts of spare cells
下载PDF
导出
摘要 针对大规模或超大规模胚胎细胞阵列的功能分化过程和自修复过程资源消耗大、耗时长及实现复杂等问题,提出了一种基于功能分解思想的新型总线型细胞阵列结构。对总线型细胞阵列结构进行了设计,制定了相应的故障自修复策略,并与现有的胚胎细胞阵列结构做了对比分析。同时分析了功能块内细胞组成不同的情况下,阵列的资源消耗情况和阵列的可靠性情况,研究了功能块中空闲细胞数量的选择,同时兼顾硬件资源消耗和阵列的可靠性两方面的问题,保证系统在一定的可靠性前提下资源消耗较少,为实际电路设计提供支持指导。 For large scale or very large scale embryonic circuits,in the process of function differentiation and self-repairing faced with the problems such as huge hardware consumption,huge time consumption and hard to completed and so on,in this paper,a Bus-based Embryonic Array(BEA)is proposed,which is based on the function decomposition.The structure of BEA is designed,a new self-repairing strategy is put forward,and the comparison of the BEA with the original array structure is analyzed.The resource consumption and the reliability of the BEA are analyzed with different cells composition.Considering the resource consumption and the reliability of the BEA,the choice of spare cells in BEA is researched,to ensure the less resource consumption with the same reliability.The research on the spare cells in the BEA is helpful to the design of the real circuit.
作者 王涛 蔡金燕 孟亚峰 WANG Tao;CAI Jinyan;MENG Yafeng(Department of Electronic and Optical Engineering, Mechanical Engineering College, Shijiazhuang 050003, China)
出处 《计算机工程与应用》 CSCD 北大核心 2017年第8期44-49,101,共7页 Computer Engineering and Applications
基金 国家自然科学基金(No.61271153 No.61372039)
关键词 总线型细胞阵列 功能块 可靠性 资源消耗 空闲细胞 bus-based embryonic array function model reliability resource consumption spare cells
  • 相关文献

参考文献6

  • 1王友仁,崔坚,游霞,黄三傲,姚睿.仿生硬件及其进展[J].中国空间科学技术,2004,24(6):32-42. 被引量:15
  • 2王南天..基于原核仿生阵列的自修复技术研究[D].国防科学技术大学,2011:
  • 3李廷鹏..基于总线结构的仿生自修复技术研究[D].国防科学技术大学,2012:
  • 4朱赛,蔡金燕,孟亚峰,潘刚.胚胎电子细胞中基因备份数目优选方法[J].北京航空航天大学学报,2016,42(2):328-336. 被引量:7
  • 5杨姗姗..胚胎型仿生硬件细胞电路设计与自修复方法研究[D].南京航空航天大学,2007:
  • 6张媛..面向芯片级自修复的胚胎电子电路设计与实现[D].南京航空航天大学,2008:

二级参考文献34

  • 1游霞.数字仿生硬件在线进化技术研究.南京航空航天大学研究生学位论文,2004. 被引量:1
  • 2Levi D, Guccione S A. GeneticFPGA: Evolving Stable Circuits on Mainstream FPGA Devices. Proceedings of the First NASA/DOD Workshop on Evolvable Hardware, USA, 1999: 12~17 被引量:1
  • 3Langeheine J, Becker J, Foiling S, et al. A CMOS FPTA Chip for Intrinsic Hardware Evolution of Analog Electronic Circuits. Proceedings of Third NASA/DOD Workshop on Evolvable Hardware, USA, 2001: 172~175 被引量:1
  • 4Tan K C, Chew C M, Tan K K, et al. Autonomous Robot Navigation Via Intrinsic Evolution. Proceedings of the 2002 Congress on Evolutionary Computation, 2002, 1:1272~1277 被引量:1
  • 5Stephen L S, David P C. Evolving Image Processing Operations for an Evolvable Hardware Environment. The 5th International Conference on Evolvable Systems: From Biology to Hardware, Trondheim, Norway, 2003:332~343 被引量:1
  • 6Koza J R. Automated Synthesis of Analog Electrical Circuits by Means of Genetic Programming. IEEE Trans. On Evolutionary Compution, 1997, 1 (2): 109~128 被引量:1
  • 7Ricardo Zebulum, Adrian Stoica, Didier Keymeulen, et al. Automatic Evolution of Signal Seperators Using Reconfigurable Hardware. The 5th Conference on Evolvable Systems: From Biology to Hardware, Trondheim,Norway, 2003:285~294 被引量:1
  • 8Keymeulen D, Zebulum R, Stoica A, et al. Initial Experiments of Reconfigurable Sensor Adapted by Evolution.Proc. of 4th International Conference on Evolvable Systems: From Biology to Hardware, Tokyo, Japan, 2001:303~313 被引量:1
  • 9Keymeulen D, Stoica A, Buehler M, et al. Evolutionary Mechanisms for Smart On-board Adaptive Sensing Applied to the MECA Electrome. Proceedings of IEEE Aerospace Conference, USA, 2001, (5): 52309~52318 被引量:1
  • 10Cesar Ortega, Andy Tyrrell. A Hardware Implementation of an Embryonic Architecture Using Virtex FPGAs.Proc. of Third International Conference on Evolvable Systems: From Biology to Hardware, Edinburgh, UK,2000:145~154 被引量:1

共引文献20

同被引文献3

引证文献1

二级引证文献2

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部