摘要
本文介绍了一种利用混合数字锁相环(HDPLL)实现码元定时恢复的新方法。HDPLL中定时误差检测器、环路滤波器是全数字的,而VCXO使用了模拟器件。定时误差检测器从基带眼图中提取定时相位误差。此信号与载波相位信息无关,因而容许码元定时和载波相位恢复操作同时进行。
Anovel approach to implement symbol timing recovery is presented which uses a hybrid digital phase locked loop (HDPLL).The timing error detector and loop filter of HDPLL are all digitized, whereas the VCXO employs analog components. The baseband eye diagram drives a timing error detector to provide the timing error. This signal is independent of carrier phase information, thus permitting parallel symbol timing and carrier phase recovery operations.
关键词
调制
解调
码元定时恢复
数字信号处理
眼图
modulation
demodulation
symbol timing recovery
digital signal processing
eye diagram
