摘要
为了满足相控阵雷达对通道数、采样率日益增高的要求,提出了一种采用3片4通道ADC实现12路高速AD采样的方案,结合高性能FPGA完成芯片的控制及数据处理,实现系统需求。介绍了多通道高速AD采样电路设计方案,分析了电源完整性、时钟抖动对系统性能的影响,产品的闭环测试验证了方案的正确及合理性。该方案通用性强,参数配置灵活方便,可广泛应用于相控阵雷达、MIMO通信、声呐等。
In order to meet the needs of the phased array radar channel number,sampling rate increasing,put forward a kind of using 3 ADC 4 channel to achieve 12 high-speed AD sampling scheme,control and data processing with high performance FPGA chip,realize the system requirements.The design scheme of multi -channel high speed AD sampling circuit is introduced,The influence of power integrity and clock jitter on system performance is analyzed.The closed-loop test of the product verifies the correctness and rationality of the scheme.The scheme is versatile and flexible in parameter configuration.It can be widely used in phased array radar.MIMO communication,sonar and so on.
出处
《电子质量》
2018年第2期11-14,共4页
Electronics Quality
