摘要
针对高速比较器,定性分析了影响比较器速度的因素,探讨了在设计预放大锁存比较器时,如何调整前置放大器增益大小及减小比较器延时,定量给出比较器的前置放大器的增益及延时时间。最后基于VIS 0.4μm BCD工艺,使用Hspice进行了电路仿真分析,仿真结果验证了理论分析的正确性。
The factors affecting the speed of the comparator are analyzed qualitatively. The way to choose the gain and bandwidth of preamplifier is discussed. The gain of preamplifier and delay time are obtained. Based on VIS 0. 4 μm BCD process,the circuits were simulated by Hspice. Simulation results are given to verify theoretical analysis.
出处
《陕西理工大学学报（自然科学版）》
2017年第6期13-18,共6页
Journal of Shaanxi University of Technology:Natural Science Edition
基金
陕西省教育厅科学研究计划项目(15JK1149)
陕西理工学院人才启动项目(SLGQD15-12)
