摘要
提出了一种用于威尔金森(Wilkinson)A/D转换器(ADC)的高速高精度比较器的设计方法。该比较器由三级预放大器和一级输出放大器组成,采用开环结构和多级级联的形式,以满足增益和速度的要求。为了消除失调电压对电路的影响,采用输出失调消除技术进行失调电压校正。采用3.3VTSMC 0.18μm CMOS工艺完成电路设计。Spectre仿真结果表明,在1MHz最高采样频率下,该比较器的分辨率达到0.4mV,传输延迟小于20ns,满足12位Wilkinson ADC的要求。
A high-speed and high-resolution CMOS comparator for Wilkinson A/D converter was designed.The comparator was comprised of three preamplifiers and one output stage realized by a current operational amplifier.An open-loop architecture was adopted for the comparator,and multiple stages were cascaded to achieve the desired gain and speed.Output offset storage was adopted to cancel offset voltage of the amplifier.The circuit was designed based on 3.3-V TSMC 0.18 μm CMOS process.Results from Spectre simulation showed that the proposed comparator had a resolution of 0.4 mV at a maximum sampling frequency of 1 MHz,and a propagation delay less than 20 ns,which satisfied the requirements of 12-bit Wilkinson A/D convertor.
出处
《微电子学》
CAS
CSCD
北大核心
2013年第2期174-178,共5页
Microelectronics
基金
国家自然科学基金资助项目(60972157
61101190)
国家重大科学仪器专项资助项目(2011YQ040082)
