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基于FPGA和FIR滤波的数字全息零级像抑制

Zero-order Image Elimination for Digital Hologram Based on FPGA and FIR Filter
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摘要 提出了一种基于现场可偏程门阵列FPGA和FIR滤波器的离轴数字全息图零级像抑制方法,首先根据数字全息图的频谱特性设计用于零级像抑制的二维FIR高通滤波器,获得滤波系数,根据数字滤波原理在FPGA芯片内部设计存储器缓冲模块、像素数据处理模块、多相分解模块、分布式算法模块和求和模块实现全息图数据的零级像滤波。仿真实验结果表明,实时滤波结果数据零级像抑制效果明显,并做到了资源和效率方面的良好均衡。 A method of zero - order image elimination based on field programmable gate array (FPGA) and finite impulse response (FIR) filter for off - axis digital hologram has been proposed. Firstly, the two - dimensional FIR high pass filter is designed to sup- press the zero - order image according to the spectral characteristics of the digital hologram and the filter coefficients are obtained. Then modules such as memory buffer module, pixel data processing module, multi - phase decomposition module, distributed algorithm mod- ule and sum module are designed in FPGA to filter the zero - order image. The simulation results show that the real - time filtering effect about the zero - order image elimination is obvious and the resources and the efficiency are well balanced.
出处 《网络新媒体技术》 2017年第5期36-41,共6页 Network New Media Technology
基金 福建师大校教改重点项目(I201601004)资助课题 福建省教育厅中青年教师教育科研项目(JA15136)
关键词 数字全息 FIR高通滤波 现场可编程门阵列 FPGA多相分解 分布式算法 digital holography, FIR high pass filter, field programmable gate array(FPGA) , multi- phase decomposition, distributed algorithm
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