摘要
随着集成电路工艺进入超深亚微米和纳米数量级,单位面积上的功耗消耗和电流密度明显上升,而这会导致超大规模集成电路中电源网络的IR Drop问题,对于超大规模集成电路进行IR Drop分析就成为必要。为了提高深亚微米工艺下低功耗芯片的性能和成品率,有必要对超大规模低功耗芯片的IR Drop成因进行研究,并运用EDA工具对其进行分析,通过IR Drop分析结果找出芯片电源网络的缺陷,并对IR Drop敏感区域进行相关干预,并获得预期的改善。
With the integration of VLSI technology into the ultra deep sub micron and nanometer orders, the power consumption and current density per unit area have increased significantly, which will lead to the IR Drop problem of the power network in vlsi. It is necessary for VLSI to do IR Drop analysis. In order to improve the performance and yield of low power chips in deep submicron technology, it is necessary to study the causes of IR and Drop of ultra large scale and low power chips, and analyze them using EDA tools. Through IR Drop analysis, we find the defects of chip power network, and interfere with the IR Drop sensitive region, and get the expected improvement.
作者
孙艳
SUN Yan(Shanghai Zhaoxin Semiconductor Co.,Ltd, Shanghai 201203, China.)
出处
《集成电路应用》
2017年第6期69-73,共5页
Application of IC
基金
上海市软件和集成电路产业发展专项基金(15RJ0222)
