摘要
针对弹载数据回读过程中,并行数据传输难以同时钟完全同步,且并行电缆线之间的相互串扰等问题,造成并行数据回读电缆长度一般限制在几十厘米,因此设计了一种基于FPGA和LVDS的弹载数据回读系统。以FPGA作为控制核心,以FT245BL作为USB控制芯片,采用低压差分信号技术接口解串和驱动芯片相结合,保证了数据有效的远程收发。试验表明,回读系统能够很好地完成数据传输工作,且数据传输迅速、准确,无错帧与丢帧现象,具有一定的工程应用价值。
For on-board data back to the reading process, the parallel data transmission is difficult to complete synchronization clock at the same time, and the interaction between the parallel cable crosstalks, caused the parallel data read back cable length is generally limited to a few centimeters ,so it needs to design a readout system for missile- loaded data based on FPGA and LVDS. The system designed the FPGA as the core,used the FF245BL as the control chip of USB, and adopted the LVDS technique that combined interface solution string and the drive chip. The combi- nation of effective remote data transceiver. Experiments show that the data reading system can complete data remote transmission quickly and accurately without frame error or frame losing and has engineering practical value.
出处
《电子器件》
CAS
北大核心
2017年第1期113-117,共5页
Chinese Journal of Electron Devices
基金
国家自然科学基金项目(50930009
51075394)
