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LDPC短码的对数域译码算法的FPGA实现研究

FPGA Implementation of Log-Domain Decoding Algorithm about LDPC Short Codes
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摘要 LDPC码不仅在保证通信的安全上占据重要的优势,并且在信道环境相对较差的条件下展现出的巨大应用前景。因此,有理由相信对LDPC码进行深入的研究有助于进一步改善通信的质量。文中重点阐述了随机构造的LDPC短码的FPGA实现过程,采用复杂度较高的对数域译码算法来获取较优的译码性能。并且在实现的过程中,使用状态机控制译码的各个模块,并通过Modelsim软件仿真获取译码单元对应的时序波形图。 LDPC codes not only play an important role in ensuring the security of communication,but also show a great prospect in the relatively poor channel environment.Therefore,there is reason to believe that further research on LDPC codes will help to improve the quality of communication.In this paper,the FPGA implementation of LDPC shortcodes with random structure is focused on,and the logarithm domain decoding algorithm with higher complexity is adopted to obtain better decoding performance.And in the process of realization,the state machine is used to control the decoded modules,and the corresponding sequential waveform of the decoding unit are obtained by Modelsim software.
出处 《舰船电子工程》 2017年第4期38-43,共6页 Ship Electronic Engineering
关键词 LDPC短码 对数域译码 FPGA LDPC shortcodes log-domain decoding FPGA
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