摘要
综述了面向宇航应用的SPARC架构嵌入式处理器芯片的发展历程及技术产品,介绍了新一代SPARC架构多核处理器SOC芯片(S698PM芯片)的设计,阐述了其在性能优化和可靠性优化方面的设计方法。S698PM芯片架构采用SMP对称多处理架构,配置四核高性能SPARC V8处理器,具备二级缓存控制,数据吞吐能力大;芯片具备丰富的片上外设及宇航总线接口;支持多款嵌入式实时操作系统(EOS)。
The development of SPARC architecture embedded processors for aerospace applications is summarized. The design of a new generation of high performance and radiation-hardened SPARC multi-core processor SOC chip （$698PM） is presented with the description of the design techniques of SOC performance and reliability optimization. The $698PM processor is designed in SMP symmetric multi processor architecture with quad-core high performance V8 SPARC processors running on a 128-bit high speed bus. It is configured with two - level cache mechanism which enables the processor to achieve a much higher data throughput capacity. The $698PM processor has features of superior reliability design and a variety of embedded real - time operating systems （ EOS ） is fully supported. Due to a rich set of on - chip peripherals and extensive aerospace bus interfaces designed, the S698PM processor is a ideal design for aerospace oriented applications.
出处
《航天控制》
CSCD
北大核心
2016年第4期89-94,共6页
Aerospace Control
