摘要
在现场可编程门阵列器件(FPGA)的高速实时信号处理系统中,多路数据对齐器是常用的电路设计。介绍了一种运用硬件描述语言参数化方式设计的多通道数据对齐方法,首先缓存各路数据,然后依据数据特征检测同步标志信号并寄存地址,对齐后同步读出。将多路对齐逻辑隔离开来,通过设置不同的同步标志检测电路可以适应多种应用,结构简单、可扩展性强;最大限度减少数据丢失,保证数据连续性;同时解决了跨时钟域的问题。列举了对齐器的两种应用,并通过仿真验证和器件编程在线校验。
Multi-channel data aligner is a common digital circuit in the high-speed and real-time signal processing systems with field programmable gate array（FPGA）architecture.This paper introduces a method of multi-channel data auto-alignment based parameterization method on VHDL language.Multi-channel data is cached separately and then the synchronous sign-flags are detected and the addresses are registered.At last,all data are read out synchronously.Separating from the multi-channel alignment logics and setting different synchronous flags detection circuits,the method can adapt different application.It has simple structure and good scalability.It performs processing with minimal data loss to achieve continuous data stream.Also the problem of asynchronous clock is resolved.Two circuit designs using this method are introduced,and simulation and programming are made for validation.
出处
《雷达科学与技术》
北大核心
2016年第3期297-300,共4页
Radar Science and Technology
关键词
现场可编程门阵列
参数化设计
多通道
数据对齐
field programmable gate array（FPGA）
design parameterization
multi-channel
data a lignment
