摘要
压缩传感信号采样理论,将信息获取的技术问题从采样端转移到接收端,并使采样率很低的信号能被精确重建.与压缩传感技术不断完善的理论研究相比,其硬件结构实现更是研究的新方向.本文提出了一种基于压缩传感的CMOS图像传感器硬件电路结构,在模数转换前实现了图像的同时传感并压缩,可用于超高速成像.该结构采用1.8V0.18μm CMOS工艺实现,帧率可达每秒几万到几十万帧,适合于压缩传感的应用.
Compressed Sensing （CS） signal sampling theory makes the technology problem of the information acquisition be transferred from the sampling end to the receiving end, and signals with low sampling rate can be accurately reconstructed. Compared to the theory of CS technology which is constantly improved, the implementation of the hardware structure is a new direction. A CMOS image sensor（CIS） architecture based on CS for ultrahigh-speed imaging is proposed. The sensor senses and compresses signals at the same time before analog to digital conversion.The ar- chitectures implement in a 1.8 V 0. 18 μm CMOS process. The sensor could be operated at a frame rate that exceeds tens to hundreds of thousands of frames per second and it is suitable for CS applications.
出处
《北京交通大学学报》
CAS
CSCD
北大核心
2016年第2期41-46,共6页
JOURNAL OF BEIJING JIAOTONG UNIVERSITY
基金
国家自然科学基金资助项目(U1431119)
