摘要
频率合成器称为电子系统的"心脏",直接数字频率合成器(DDS)相对于传统的频率合成技术具有很明显的优点。然而,存在着输出频率有限、输出杂散严重的问题。用FPGA实现DDS受制于芯片本身运行速度和功耗的影响,因此,基于FPGA实现高速、低功耗的DDS具有重要的意义。主要设计了一种并行DDS结构。相位累加器采用四路并行,并在每一路采用两级流水线结构提高寻址速度。通过查找表与类似于坐标旋转数字计算(CORDIC)算法的角度旋转方法相结合实现相幅转换。最后,采用多相结构实现四路并行输出,得到约-120dB的无杂散动态范围(SFDR)的正交波形。四路并行结构相对于单路DDS,输出信号频谱带宽提高了四倍。
Frequency synthesizer is called the heart of electronic systems.Compared with traditional frequency synthesis technology,the direct digital synthesizer（DDS）has obvious advantages.However,it has a limited output frequency and serious output stray.Using FPGA to realize DDS is limited by the speed and power consumption of the chip itself,as a result,the FPGA based DDS of high speed and low power consumption has the vital significance.A parallel DDS structure is given.The phase accumulator adopts fourway parallel implementation,and in every way,two-stage pipelining structure is used to improve the addressing speed.The lookup table and the angle rotation method similar to the coordinate rotation digital calculation（CORDIC）algorithm are combined to realize phase transformation.Finally,the multiphase structure is adopted to realize four-way parallel output,and the-120 dB spurious free dynamic range（SFDR）orthogonal waveform is obtained.Compared with the single-way DDS,the output signal spectrum bandwidth of the fourway parallel structure is increased four times.
出处
《雷达科学与技术》
北大核心
2016年第2期215-219,224,共6页
Radar Science and Technology
