摘要
通过软件并行计算来模拟硬件串行电路计算CRC校验码的输出结果,用于提高ModBus通信协议中CRC校验程序的执行效率,并由高效的ARM汇编语言封装而成的函数来实现。程序代码的运行时间和存储空间均超过常见的高度优化的查表法。
The parallel computing of the software is used to simulate the hardware serial circuit to calculate the output results of CRC checksum, which can improve the execution efficiency of the CRC checksum procedure in the ModBus communication protocol. That is achieved by the functions which are packaged by the efficient ARM assembly language. The running time and memory space of the program code are better than the common look-up table method highly optimized.
出处
《单片机与嵌入式系统应用》
2016年第5期49-52,共4页
Microcontrollers & Embedded Systems
