摘要
利用FPGA构建64kb/s时隙业务全数字交叉的方法模拟现有时隙交叉芯片的功能,通过设置与外部CPU通信接口使交叉配置更加灵活。采用数据缓冲存储和乒乓操作的方法保证数据的无缝交叉,基于数据位的交换方式使交叉操作更简便,模块化的设计便于扩展。经过硬件电路的实测,验证了设计后数据交叉的正确性。
The paper uses FPGA to build the 64kb/s time slot business all digital cross method to simulate the function of the existing time slot cross chip, through setting up with the external CPU communication inter- face to make cross configuration more flexible. It uses the method of data buffer storage and ping pong opera- tion to ensure the seamless data, and the exchange of data is more convenient and easy to operate. After the measurement of the hardware circuit, the correctness of the design is verified.
出处
《光通信技术》
北大核心
2015年第9期44-47,共4页
Optical Communication Technology
