摘要
为了提高RSA协处理器的加解密速度,在传统的Montgomery算法的基础上,提出一种从右到左扫描的高基快速模乘算法.该方案通过减少一个减法器和一个移位寄存器并预先计算两个值,从而减少了迭代的次数.改进后的模幂算法消除了由Montgomery迭代引起的额外因子R-1,从而大大减少了硬件电路的复杂性,从右到左的扫描法有效缩短了大数模幂运算的时间.实验结果表明:在电路面积没有增加的情况下,基于0.18μm CSMC标准单元库工艺下,在10 MHz的时钟频率下,RSA密码协处理器加密1024位的明文平均仅需330ms,等效单元门为26kgate.较之其他设计,在速度和面积上都有一定的优势.
In order to speed up the operation of RSA coprocessor,an advanced high radix Montgomery module multiplication and Reft-to-Light scan modular exponentiation algorithm are proposed.The modified Montgomery module multiplication eliminates the carry propagation and decreases the number of iteration.The modified modular exponentiation algorithm eliminates the unwanted effect of the factor R-1 which is introduced by Montgomery modular multiplication.A high performance scalable public-key cipher RSA coprocessor is designed,which is based on them.The result of the hardware implementation shows that the improved RSA coprocessor is synthesized by CSMC 0.18μm library,and the total logic resources is 26 kgates,Simulation result shows that it takes an average of 330 ms to complete a 1024 bit encryption at 10 MHz.Compared with previous works,the proposed architecture can achieve better performance in chip area and speed.
出处
《微电子学与计算机》
CSCD
北大核心
2015年第8期115-119,124,共6页
Microelectronics & Computer
