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VDMOS栅引线脱落引起的阈值电压测试错误分析 被引量:1

Analysis on Measurement Error of Threshold Voltage Caused by VDMOS Gate Lead Off
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摘要 讨论了栅引线脱落导致栅悬空条件下,VDMOS器件的电流传输过程。通过器件测试与仿真,指出栅引线脱落引起阈值电压测试错误的原因。提出一种将传统"两线法"与"三线法"相结合的阈值电压测试方法,避免栅引线脱落导致阈值电压测试的误判。 The current transmission process of the VDMOS device was discussed at the condition of gate floating due to gate lead off. The reason of the threshold voltage measurement error due to the gate lead off was introduced by experiment and simulation. A threshold voltage measurement method combining the traditional "two lines method" and "three lines method" was proposed. It could avoid the threshold voltage measurement error caused by gate lead off.
出处 《微电子学》 CAS CSCD 北大核心 2014年第6期825-828,共4页 Microelectronics
基金 国家自然科学基金资助项目(60906051) 中央高校基本业务费资助项目(7210531201)
关键词 VDMOS 栅引线脱落 阈值电压 VDMOS Gate lead off Threshold voltage
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