摘要
介绍一种全差分、低功耗CMOS运算跨导放大器 (OTA) .这种放大器用于 10位分辨率、30MHz采样频率的流水线式A/D转换器的采样 保持和级间减法 增益电路中 .该放大器由一个折叠 级联OTA和一个共源输出增益级构成 ,并采用了改进的密勒补偿 ,以期达到最大的带宽和足够的相位裕度 .经过精心设计 ,该放大器在0 .35 μmCMOS工艺中带宽为 5 90MHz ,开环增益为 90dB ,功耗为 15mW ,满足高速A/D转换器要求的所有性能指标 .
The design of a full differential CMOS transconductance amplifier is presented. This amplifier is used in the sampling-holding and inter-stage subtract-gain circuits of a 10-bit, 30 MHz pipelined A/D converter. The amplifier presented consists of a folded-cascode input stage followed by a common-source output gain stage. The amplifier is compensated with an advanced Miller compensation in order to achieve maximum bandwidth and sufficient phase margin. The elaborate design of the amplifier, results in the performances of 590 MHz bandwidth, open loop gain 90 dB and power consumption 15 mW for 0.35 μm CMOS. All the performances of the amplifier satisfy the demands of high-speed A/D converter.
出处
《复旦学报（自然科学版）》
CAS
CSCD
北大核心
2001年第1期79-85,共7页
Journal of Fudan University：Natural Science
关键词
运算跨导放大器
OTA
流水线
折叠-级联放大器
压摆率
Operational Transconductance Amplifier(OTA)
pipelined
folded-cascode amplifier
slew-rate
