摘要
为满足以AVR单片机为主控端,FPGA为受控端的双核设备故障分析仪要求,设计了一种新的通信协议,给出了该协议传输层的结构。同时采用VHDL语言在FPGA芯片上完成UART的扩展及其FIFO存储器功能设计,从而实现了主从控制之间的串行通信,达到故障诊断仪的通信要求。
To meet the requirements for dual-core machinesfauh analyzer with AVR as master management and the FPGA as slave management. A new kind of communication protocol is designed. Transport layer structure of the protocol is mainly described in this report. It uses VHDL language in the FPGA chip to complete the UART expansion and FIFO memory function design. Then, the serial eommunieation between the master-slave controlseomes true. Experimental results show that the protocol can meet the practical requirements.
出处
《仪表技术》
2013年第11期44-46,共3页
Instrumentation Technology
关键词
AVR
FPGA
串行通信
通信协议
AVR
FPGA
serial communication
communication protocol
