摘要
随着现代通信系统处理的最大数据速率的不断提高,需要高速的伪随机测试信号发生器。通过对m序列生成原理的研究,提出了一种基于FPGA的高速伪随机序列产生的方法。该方法基于m序列的采样定理和移位相加性,并行产生多组初始相位不同的m序列,最后通过模2加法器获得高速的m序列。从m序列的基本原理出发,给出了实现该高速m序列发生器的硬件设计,并用ModelSim软件对其进行仿真。实验结果表明,使用该方法实现的伪随机序列发生器,结构简单、速度快。
With the continuous increment of maximum data rate in modern communication system,we need a high-speed pseudo random test signal generator. Through the study of m-sequence generation principle, this paper puts forward a generating method of high-speed pseudo random sequence based on FPGA. This method is based on m-sequence sampling theorem and shift additively. It can parallel produce multiple groups of m-sequence, which has different initial phase. Finally, through the modulo-2 adder, we can obtain a high-speed m-sequence. Departure from the basic principles of the m-sequence, hardware design and ModelSim software simulation of high-speed m-sequence generator is achieved. The results of experiment indicate that the pseudo-random sequence generator which uses this method has a simple structure and fast speed.
出处
《电子测量技术》
2013年第7期55-57,共3页
Electronic Measurement Technology
