摘要
通过分析Feistel结构和SP网络结构的分组密码算法的特点与实现结构,说明了分组算法适合可重构实现的机理,提出了以众核方式构造高性能密码算法协处理器的架构思想,在适当降低单核处理性能的情况下,因为能最大化利用芯片的电路容量,实践证明这种架构相比起单核、多核架构重构方式实现分组算法具有较为明显的整体性能优势,最后,也指出了众核带来的编程复杂、资源分配困难等问题和众核架构的核数与整体性能的压线性关系等注意事项。
Through analyzing some characteristics and implementation strucutres of block cipher algorithm of Feistel structure and SP network, this paper gives the mechanism of block cipher suitable for reconfigurable implementation, and proposes the architecture idea of high-performance crypto algorithm with many-core architecture. The maximal use of chip circuit capacity could be realized at the expense of proper decrease of the single-core processing capability, and the experiment shows that the many-core architecture has more obvious advantage than single-core or multi-core architecture. Finally, some problems and key points are also given, including complex programming, difficult resources allocation, and relationship of cores number and chip performance.
出处
《通信技术》
2013年第4期9-12,共4页
Communications Technology