摘要
在分析了IRIG-B(DC)码码型特点的基础上,提出了一种IRIG-B(DC)时间码解码的设计方法。该方法由少量外围电路与一片现场可编程门阵列(FPGA)芯片组成,来实现对IRIG-B(DC)码的解码、1PPS信号输出、实时时间显示以及串行异步通信。与传统的方法相比,该设计方案具有体积小、成本低、工作稳定等优点,完全能够替代传统的B码机箱的功能。
A decoding means of IRIG-B（DC） time code is proposed on the basis of analyzing the wave characteristics of IRIG-B（DC）code. This design is made up of peripheral circuits and FPGA to implement decoding of IRIG-B（DC） code and 1 pps signal output and real-time time display and serial asynchronous communication. Compared with traditional methods, it has lots of advantages such as smaller size, lower cost and more reliable stability, and can replace the main functions of traditional B-code device.
出处
《现代电子技术》
2012年第11期88-90,共3页
Modern Electronics Technique
