期刊文献+

面向性能优化的可重构片上网络技术研究

Study on Technology for Performance Optimization Oriented Reconfigurable Network-on-Chips
下载PDF
导出
摘要 片上网络已经成为众核时代最具潜力的片上互连解决方案。然而,现有片上网络灵活性不足,无法支持通信的动态行为。研究具有高度灵活性、适应性和可配置性的可重构片上网络,对于提高复杂应用的通信效率具有重要意义。介绍了可重构片上网络的研究背景和相关研究,提出了一个面向可重构片上网络的系统化研究框架,阐述了可重构片上网络的重要研究点,给出了相关研究结果及实验数据。 Network-on-chip(NoC) has been the most promising on-chip interconnection solution in the many-core era.However,due to its insufficient flexibility,the existing NoC cannot support dynamic behaviors of communication.Therefore,it is of great significance to develop reconfigurable NoC with more flexibility,adaptability and configurability for improving the efficiency of complicated applications.In this paper,background of development and relevant research works on reconfigurable NoC were presented.A systematic research framework for reconfigurable NoC was proposed.Major research points for reconfigurable NoC were described,and corresponding experimental results were given.
出处 《微电子学》 CAS CSCD 北大核心 2011年第2期260-264,共5页 Microelectronics
基金 国家自然科学基金资助项目(60873212)
关键词 可重构片上网络 任务映射 网络适配器 硬件级模拟器 Reconfigurable network-on-chip Task mapping Network adapter Hardware level simulation
  • 相关文献

参考文献2

二级参考文献8

  • 1Hu J, Mareulescu R. Energy-Aware Mapping for Tile-Based NOC Architectures Under Performance Constraints [C]//Proc of Asia South Paeific Des Autom Conf,2003:233-239. 被引量:1
  • 2Hu J, Marculescu R. Exploiting the Routing Flexibility for Energy/Performance Aware Mapping of Regular NoC Architectures[C]//Proc of the Design, Automation, and Test in Europe Conf, 2003 : 688-693. 被引量:1
  • 3Hu J, Marculescu R. Energy- and Performance-Aware Mapping for Regular NoC Architectures[J]. IEEE Trans on CAD of Integrated Circuits and Systems, 2005,24(4):551-562. 被引量:1
  • 4Murali S, de Micheli G. Bandwidth-Constrained Mapping of Cores onto NoC Arehitectures[C]//Proc of the Design, Automation, and Test in Europe Conf, 2004:896-901. 被引量:1
  • 5Srinivasan K, Chatha K S. A Technique for Low Energy Mapping and Routing in Network-on-Chip Architectures[C]// Proc of Int'l Symp on Low Power Electron Des, 2005: 387- 392. 被引量:1
  • 6Ascia G, Catania V, Palesi M. Multi-Objective Mapping for Mesh-based NoC Architectures[C]//Proc of Int'l Conf on Hardware-Software Codesign Syst Synthesis, 2004:182-187. 被引量:1
  • 7Hansson A, Goossens K, Raduleseu A. A Unified Approach to Mapping and Routing on a Network-on-Chip for both Best-Effort and Guaranteed Service Traffic[C]//Proc of Hindawi VLSI Design, 2007. 被引量:1
  • 8Murali S, Coenen M, Radulescu A, et al. A Methodology for Mapping Multiple Use-Cases onto Networks on Chips[C]// Proc of the Design, Automation, and Test in Europe Conf, 2006:118-123. 被引量:1

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部