摘要
提出一种基于演化硬件的补偿容错模式,将被检对象和重构对象分离,以避免自重构容错模式可能对系统造成破坏的危险.该容错模式在不影响原电路工作的前提下,利用演化硬件的自适应特性,重构出相应的电路对出错电路进行输出补偿,从而达到容错的目的.实验表明,补偿容错模式能以少量的冗余代价换取更优的容错性能,并且修复时间比自重构容错模式短,有利于实时容错.
A compensation fault tolerance model based on evolvable hardware is proposed,it separates the failed system and reconfigurable hardware to avoid the risk of destruction which exists in self-reconfiguration fault tolerance.It generates corresponding circuits by the adaptability of evolvable hardware to compensate for failed circuit,so as to achieve fault tolerance.The experimental results prove that the proposed fault tolerance model achieves great fault-tolerant capability with little redundancy.Moreover,it costs less recovery time than self-reconfiguration fault tolerance,which conducive to realize real time tolerance.
出处
《小型微型计算机系统》
CSCD
北大核心
2010年第12期2472-2475,共4页
Journal of Chinese Computer Systems
基金
国家自然科学基金项目(60773009)资助
国家"八六三"高技术研究发展计划项目(2007AA01Z290)资助
关键词
自适应
演化硬件
容错模式
数字电路
self-adaption
evolvable hardware
fault tolerance
digital circuit
