摘要
基于FPGA芯片Stratix II EP2S60F672C4设计了一个适用于宽带数字接收机的带宽可变的数字下变频器(VB-DDC)。该VB-DDC结合传统数字下变频结构与多相滤波结构的优点,实现了对输入中频信号的高效高速处理,同时可以在较大范围内对信号处理带宽灵活配置。硬件调试结果验证了本设计的有效性。
Digital down-converter is an important part of wideband digital receivers. The variable-bandwidth digital down-converter （VB-DDC）,which is suitable for wideband digital receiver, is implemented in FPGA chip Stratix II EP2S60F672C4. The VB- DDC combines the advantages of traditional digital down-conversion architectures and poly-phase filter architectures, realizes effi- cient high-speed processing for input IF signal, and could configure the bandwidth of signal processing flexibly in a large range. Hardware test result shows the effectiveness of this design.
出处
《电子技术应用》
北大核心
2010年第7期27-30,共4页
Application of Electronic Technique
