摘要
1553B总线具有可靠性高、抗干扰能力强、扩充灵活等特点,因此得到了广泛的应用;总线监视器是1553B总线系统中三类设备中的一种,用于记录和分析总线上的消息及设备状态,为系统分析提供数据源;介绍了一种基于Verilog HDL硬件描述语言的1553B总线监视器的实现方案,其中解码器部分完成串并转换、解码功能,控制部分采用字监视的工作方式,监听和记录总线上传输的每一个字,并生成相应的描述符;测试平台上的试验结果显示,BC发送命令字082AH要求RT1接收10个数据字1-AH,监视器正确监视到命令字082AH及数据字1-AH,并生成了正确的命令字描述符FFA9H和数据字描述符A3H,经验证所设计的总线监视器能够完成预期的功能。
1553B bus has been widely applied as its high reliability, anti--jamming and flexible expansion ability. The bus monitor is one of three types of devices in the 1553B system that records and analyses the messages transmitted on the bus and the status of devices to provide data source for the system analysis. This paper introduces a design of 1553B bus monitor based on Verilog HDL, in which the decoder unit transforms the serial data to the parallel and decodes the data, and the control unit works in a word mode that records every word transmitted on the bus and produces the corresponding descriptor word. On a test platform, the experiment is performed and the result shows that when BC send a command word 082AH to ask RT1 to receive ten data words 1-AH, the monitor recorded both the command word 082AH and data words 1- AH correctly and produced command word descriptor FFA9 H and data words descriptor A3H, the experiment validate the design can achieve the antieipative goal with good reliability.
出处
《计算机测量与控制》
CSCD
北大核心
2010年第6期1367-1369,共3页
Computer Measurement &Control
