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系统芯片的可测性设计

Design for Testability of System on Chip
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摘要 系统芯片SoC可以实现一个系统的功能,为了保证系统芯片的功能正确性与可靠性,在它的设计与制造的多个阶段必需进行测试。由于系统芯片的集成度高,结构和连接关系复杂,使得对它进行测试的难度越来越大,因此需要采用专门的测试结构。本文对系统芯片的可测性设计以及测试结构的设计方法等进行了介绍和综述。 The system on chip (Sot) is able to implement the functions of a system.It is necessary to carry out test in the several steps of SoC design in order to insure the functional correctness and reliability.It is more and more diffcult to perform the test for system on chip because there are many cores and user defined logics in a SoC,therefore the special test mechanism is needed. The designs of test mode and test access mechanism for SoC are introduced and reviewed in this paper.
作者 陈翎 潘中良
出处 《数字技术与应用》 2010年第4期9-11,共3页 Digital Technology & Application
基金 广东省自然科学基金项目(7005833) 广东省教育部产学研结合项目(090300339)资助
关键词 系统芯片 可测性设计 测试方法 测试存取机制 System on chip,design for testability,test mode,test access mechanism.
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参考文献8

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