期刊文献+

变漂移区厚度SOI横向高压器件的优化设计 被引量:1

Optimization and Design of SOI Lateral High Voltage Devices with Varied Drift Region Thicknesses
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摘要 提出了一种耐压技术——横向变厚度VLT技术,以及基于此技术的一种高压器件结构——变厚度漂移区SOI横向高压器件,借助二维器件仿真器MEDICI,深入研究了该结构的耐压机理。结果表明,变厚度漂移区结构不但可以使横向击穿电压提高20%,纵向击穿电压提高10%,而且可以使漂移区掺杂浓度提高150%~200%,从而降低漂移区电阻,使器件优值提高40%以上。进一步研究表明,对于所研究的结构,采用一阶或二阶阶梯作为线性漂移区的近似,可以降低制造成本,并且不会导致器件性能的下降。 Corresponding to the variation of lateral doping (VLD) technique, a sustaining- voltage technique-variation of lateral thickness (VLT) is developed in this paper. Based on the VLT technique, a new SOl high voltage device with step drift regions is proposed and investigated in detail using the two-dimensional semiconductor simulator MEDICI. The results show that the device with VLT structure is enabled to increase by 20% in lateral breakdown voltage, 10% in vertical breakdown voltage, and 150%-200% in doping concentrations in the drift region. As a result, the body resistance decreases and the Figure of Merit (FOM) increases beyond 40%. The devices with the single or two-step drift regions have the cost-effective merits due to the insensitivity of process conditions and the elimination of the high temperature annealing. At same time, the approximately ideal breakdown voltage and drift resistance are still maintained.
出处 《固体电子学研究与进展》 CAS CSCD 北大核心 2010年第1期42-46,79,共6页 Research & Progress of SSE
基金 国家自然科学基金(60806027) 中国博士后基金(20070411013) 江苏省自然科学基金(BK2007605) 电子薄膜与集成器件国家重点实验室开放基金(KF2007001)
关键词 绝缘层上硅 击穿电压 漂移区电阻 横向变掺杂 横向变厚度 SOI breakdown voltage drift resistance variation of lateral doping variation of lateral thickness
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参考文献13

  • 1Mullett. Charles E, PSMA Chair. A 5-year power technology roadmap[C]. IEEE Applied Power Electronic Conf, California, 2004:11-17. 被引量:1
  • 2Jeffery D Shepard. Power electronics futures [C]. IEEE Applied Power Electronic Conf, California, 2004 : 31-34. 被引量:1
  • 3Leung Y K, Kuehne S C, Huang V S K, et al. High voltage, high speed lateral IGBT in thin SO1 for power IC[C]. IEEE Int SOI Conf, Piscataway, 1996:132- 133. 被引量:1
  • 4Arnold E. Silicon-on-insulator devices for high voltage and power IC applications[J]. J Electrochem Soc, 1994,141 (7) : 1983-1988. 被引量:1
  • 5Huang Y S, Baliga B J. Extension of resurf principle to dielectrieally isolated power devices [C]. Int Sym Power Semi Dev & IC's, Baltimore, 1991:27-30. 被引量:1
  • 6Zingg R P, Weijland I, Zwol H V, et al. 850 V DMOS-switch in silicon-on insulator with specific Ron 13 Ω-mm2[C]. IEEE Int SOl Conf, Wakefield, 2000: 62-63. 被引量:1
  • 7Merchant S, Arnold E, Baumgart H, et al. Dependence of breakdown voltage on drift length and buried oxide thickness in SOI RESURF LDMOS transistors [C]. IEEE Int Sym Power Semi Dev & IC' s, Monterey, 1993:124-128. 被引量:1
  • 8Zhang S D, Sin J K O, Laim T M L, et al. Numerical model of linear doping profiles for high-voltage thin- film SOI devices[J]. IEEE Transactions on Electron Devices, 1999,46(5):1036-1041. 被引量:1
  • 9张盛东,韩汝琦,TommyLai,JohnnySin.漂移区为线性掺杂的高压薄膜SOI器件的研制[J].电子学报,2001,29(2):164-167. 被引量:5
  • 10杨寿国,罗小蓉,李肇基,等.阶梯厚度漂移区SOI新结构耐压分析[c].四川省电子学会半导体与集成电路技术专委会学术年会,2006:9-12. 被引量:1

二级参考文献15

  • 1Lai T M L,Proc 7th Int Symp Power Semiconductor Devices and Ics,1995年,315页 被引量:1
  • 2Kokosa R A,Davies R L.Avalanche breakdown of diffused silicon p-n juncitons[J].IEEE Transaction on Electron Devices,1966;13 (12):874-881 被引量:1
  • 3Fulop W.Calculation of avalanche breakdown of silicon p-n junction [J].Solid-State Electron,1967;10:39 被引量:1
  • 4Imam M,Quddus M,Adams J,et al.Efficacy of charge sharing in reshaping the surface electric field in high-voltage lateral RESURF devices [J].IEEE Transaction on Electron Devices,2004;51 (1):141-148 被引量:1
  • 5Overstraeten R V,Man H D.Measurement of the ionization rates in diffused silicon p-n junctions[J].Solid-State Electron,1970;13(5):583-603 被引量:1
  • 6Udrea F,Garner D,Sheng K,et al.SOI power devices[ J ].Electronics & Communication Engineering Journal,2000;12(1):27-40 被引量:1
  • 7Ludikhuize A W,Van der Pol J A,Heringa A,et al.Extended (180V) voltage in 0.6 μm thin-layer-SOI A-BCD3 technology on 1 μm box for display.automotive & consumer applications[A].Proceedings of the ISPSD' 02[C].2002:77 被引量:1
  • 8Funaki H,Yasuhara N,Nakagawa A.High voltage lateral MOS thyristor cascade switch on SOI-safe operating area of SOI-resurf devices[A].Proceedings of the ISPSD' 96[C].1996:101 被引量:1
  • 9Liu Q Y,Li Z J,Zhang B,et al.The research on breakdown voltage of high voltage SOI LDMOS devices with shield trench [A].Proceedings of the ICSICT01[C].2001:159 被引量:1
  • 10Zhang B,Guo Y F,Li Z J,et al.A new breakdown model of RESURF SOI device with multi-regions fixed interface charge [A].Proceedings of the ICCC AS04[C].2004:1 521 被引量:1

共引文献5

同被引文献7

  • 1Huang Y S, Baliga B J, Tandon S, et ah Comparision of DI and JI lateral IGBTs [C]. Proceedings of the 4th International Symposium on Power Semiconductor Deviees & Ics, Waseda University Tokyo, 1992:40-43. 被引量:1
  • 2Merchant S, Arnold E, Baumgart H, et al. De pendence of breakdown voltage on drift length and buried oxide thickness in SOI RESURF LDMOS transistors [C]. Proceedings of the 5th International Symposium on Power Semiconductor Devices &ICs. Monterey, CA, 1993: 124-128. 被引量:1
  • 3Luo Xiaorong, Zhang Bo, Li Zhaoji, et al. SOI highvoltage device with step thickness sustained voltage layer[J]. Electronics Letters, 2008, 44(1): 55-56. 被引量:1
  • 4Guo Yufeng, Wang Zhigong, Sheu Gene. Variation of lateral thic kness techniques in SOI lateral high voltage transistors[C]. ICCCAS09, 2009. (Accepted). 被引量:1
  • 5Tarik B, Takahisa M, Hiroyuki F. The memsnas process: Microloading effect for micromachining 3-D structures of nearly all shapes[J]. Journal of Microelectr-omechanical Systems, 2004, 13(2): 190-199. 被引量:1
  • 6ATHENA Userts Manual, ver. 5.14.0-5.8. R, SILVACO Int-ernational 4701 Patrick Henry Drive,. 被引量:1
  • 7薛龙来,郭宇锋,周井泉,孙玲.具有倾斜表面漂移区的SOI LDMOS的工艺设计[J].微电子学,2010,40(2):300-304. 被引量:3

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