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PLRU替换算法在嵌入式系统cache中的实现 被引量:6

The Design of PLRU Cache in Embedded System
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摘要 合理的cache设计是缩小处理器和存储器速度差距的主要解决方法,也是影响系统性能的关键因素之一。cache替换策略是影响cache性能的主要因素,目前最常用的替换算法是LRU算法,为了降低模块复杂度和实现的难度,从LRU算法简化出一种PLRU(Pseudo LRU)替换算法。通过采用开源的SimpleScalar仿真工具,对LRU、RANDOM、FIFO、PLRU等各种常见的cache替换算法进行了性能比较和分析,并对PLRU进行实现。实验结果表明,使用PLRU替换算法cache的缺失率与LRU算法基本相同,但是有着更小的面积和更短的关键路径。 Suitable design of cache is the main solution to decrease the processor - memory speed gap and becomes the critical performance factor of systems. The replacement policy is the main factor of cache performance. To simplify the complexity of implementation,we use PLRU replacement policy which come from the most commonly used replacement policy LRU. We also use the SimpleScalar to simulate several replacement policies of cache to compare their performance. And we implement the PLRU at last. Our results show that the PLRU can approximate LRU with much lower complexity for a wide variety of cache sizes and degrees of associativities.
作者 李洪 毛志刚
出处 《微处理机》 2010年第1期16-19,共4页 Microprocessors
关键词 伪LRU算法 SimpleScalar平台 高速缓存 PLR U SimpleScalar Cache
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参考文献7

  • 1段宗涛,周兴社,董明峰.主存储器访问调度技术研究[J].微电子学与计算机,2004,21(10):55-59. 被引量:4
  • 2江喜平,高德远,张盛兵,王晶.CISC中混合Cache的优化设计[J].计算机工程与应用,2006,42(10):109-111. 被引量:3
  • 3Ghasemzadeh H, Mazrouee S, Kakoee MR. Modified pseudo LRU replacement algorithm [ J ]. Engineering of Computer Based Systems. 2006 (52) :27 - 30. 被引量:1
  • 4Soryani Mohsen, Sharifi Mohsen. Performance Evaluation of Cache Memory Organizations in Embedded Systems [ J]. Information Technology,2007:1045 - 1050. 被引量:1
  • 5Nurvitadhi E,Jumnit Hong, Shih- Lien Lu. Active Cache Emulator [ J ]. Very Large Scale Integration (VLSI) Systems,2008 (7) :229 - 240. 被引量:1
  • 6Si- En Chang, Chia - Chang Hsu. Efficient simulation methods for multi - level cache memory hierarchies [ J ]. System Sciences, 1994 (4) :221 - 230. 被引量:1
  • 7Kharbufli M, Solihin Y. Counter - based cache replacement algorithms [ J ]. Computer Design : VLSI in Computers and Processors. 2005 (10) :61 - 68. 被引量:1

二级参考文献16

  • 1John L Hennessy,David A Patterson.Computer Architecture:A Quantitative Approach[M].3th Edition,MORGAN KAUFMANN PUBLISHERS,INC,2002:384 被引量:1
  • 2V Agarwal,M S Hrishikesh,S W Keckler et al.Clock rate versus IPC:the end of the road for conventional microarchutectures[C].In:Proceedings of the 27th International Symposium on Computer Architecture,2000:248~259 被引量:1
  • 3Wm A Wulf,Sally A McKee.Hitting the Memory wall:implications of the obvious[J].ACM SIGARCH Computer Architecture News,1995;23 (1):20~24 被引量:1
  • 4L A Barroso,K Hharachorloo,E Bugnion.Memory system characterization of commercial workloads[C].In:Proceedings of the 25th Annual International Symposium on Computer Architecture,1998:3~14 被引量:1
  • 5Steven Przybylski.The performance Impact of Block Sizes and Fetch Strategies[C].In:17th Annual International Symposium of Computer Architecture,Seattle,Washington,1990:160~ 169 被引量:1
  • 6Aleksandar Milenkovic,Milena Milenkovic.Performance Analysis of Cache Replacement Policies.Department of Electrical and Computer Engineering University of Alabama in Huntsville,2002 被引量:1
  • 7Embedded Intel486^TM Processor Family Developer's Manual.1997 被引量:1
  • 8S. Rixner et al., Memory Access Scheduling, Proc. 27th Ann. Int'l Symp. Computer Architecture, IEEE CS Press,2000, pp. 128-138. 被引量:1
  • 9王爱英等编著.计算机组成与结构.第2版,北京:清华大学出版社,1995,78-79页. 被引量:1
  • 10John L, Hennessy,David A Patterson著,郑纬民,汤志忠,汪东升,陆家运,译.计算机系统结构:一种定量的方法.清华大学出版社,2002年8月,第1版,123-125. 被引量:1

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