摘要
提出了一种基于FPGA的低复杂度SDRAM控制器实现方法,通过读写进程与刷新进程的合理安排,使得用户在进行全页突发写或者突发读时,无须考虑SDRAM刷新请求,大大简化了控制器的设计。
This paper presents an implementation method of SDRAM controlle with low complexityr, in which refreshing,writing and reading are dealed well with so that it does not have to take refreshing requirement into account during a reading or writing burst.
出处
《计算机与数字工程》
2010年第1期194-196,共3页
Computer & Digital Engineering
