摘要
A novel PCI Express （peripheral component interconnection express） direct memory access （DMA） transaction method using bridge chip PEX 8311 is proposed. Furthermore, a new method on optimizing PC1 Express DMA transaction through improving both bus-efficiency and DMA-effieiency is presented. A finite state machine （FSM） responding for data and address cycles on PCI Express bus is introduced, and a continuous data burst is realized, which greatly promote bus-efficiency. In software design, a driver framework based on Windows driver model （WDM） and three DMA optimizing options for the proposed PCI Express interface are presented to improve DMA-efficiency. Experiments show that both read and write hardware transaction speed in this paper exceed PCI theoretical maximum speed （133 MBytes/s）.
A novel PCI Express （peripheral component interconnection express） direct memory access （DMA） transaction method using bridge chip PEX 8311 is proposed. Furthermore, a new method on optimizing PC1 Express DMA transaction through improving both bus-efficiency and DMA-effieiency is presented. A finite state machine （FSM） responding for data and address cycles on PCI Express bus is introduced, and a continuous data burst is realized, which greatly promote bus-efficiency. In software design, a driver framework based on Windows driver model （WDM） and three DMA optimizing options for the proposed PCI Express interface are presented to improve DMA-efficiency. Experiments show that both read and write hardware transaction speed in this paper exceed PCI theoretical maximum speed （133 MBytes/s）.
