摘要
在分析LUPA300型面阵CMOS图像传感器驱动时序关系的基础上,设计了此面阵CMOS图像传感器的驱动时序。选用CPLD器件作为硬件设计平台,试验VHDL语言对驱动时序进行了硬件描述,采用Quartus Ⅱ对所设计的驱动进行了功能仿真,并针对ALTERA公司的EPM1270T144C5进行了RTL级仿真及配置。系统测试结果表明,所设计的驱动时序可以满足面阵CMOS图像传感器LUPA300的各项驱动要求。
Driving schedules of LUPA300 array CMOS image sensor have been examined. The driving timing was designed for array CMOS sensor. Complex programmable logic device （CPLD） is used as hardware design platform for the sensor. The driving timing is described with VHDL. The function of the system was simulated by Quartus Ⅱ and was successfully fulfilled. The design is fitted into EPM1270T144C5 （a CPLD produced by ALTERA）. Experiments show that the driving timing is suitable for the high-speed CMOS image sensor.
出处
《电子器件》
CAS
2009年第3期500-503,共4页
Chinese Journal of Electron Devices
