摘要
本文基于CPLD,设计了一种针对增量式光电编码器的倍频鉴相计数电路。在介绍了倍频、鉴相、计数原理的基础上,使用VHDL语言实现了对编码器脉冲的采集。
In this paper, we design the circuit of quadruple frequency, phase discrimination and counting pulse for incremental encoder based on CPLD. On the base of introducing the theory about quadruple frequency, phase discrimination and counting pulse, we realize the acquisition of encoder using VHDL language.
出处
《仪器仪表用户》
2009年第4期82-84,共3页
Instrumentation
关键词
倍频
鉴相
计数
增量式光电编码器
CPLD
quadruple frequency
phase discrimination
counting pulse
incremental encoder
CPLD
