摘要
采取基-4按频率抽取FFT算法,设计一种可在FPGA上实现的64点、32位长、定点复数FFT处理器。基-4蝶形运算单元中采用六级流水线设计,并行处理4路输入/输出数据,能极大地提高FFT的处理速度。该设计采用VHDL描述的多个功能模块,经ModelSim对系统进行逻辑综合与时序仿真。实验证明,利用FPGA实现64点FFT,运算速度快,完全可以处理高速实时信号。
In this article,the processor is designed for 64 point, 32 b, fixed, complex FFT in FGPA based on the radix 4 FFT DIF algorithm. The six levels pipeline structure and four parallel data are used in the radix - 4 butterfly module. The main purpose of using these techniques is get better performance by balancing the speed and the power consume. This design has some function blocks based on VHDL, and synthesized and timingsimulated with the software ModelSim. The simulation result shows that the 64 - point FFT processor is fast enough for processing high - speed and real - time signals.
出处
《现代电子技术》
2009年第14期1-3,6,共4页
Modern Electronics Technique
基金
国家自然科学基金资助项目:基于多尺度几何分析的可伸缩视频编码方法(60572078)
