摘要
利用快速傅里叶变换(FFT)在频域实现循环相关是一种GPS C/A码快速捕获方法,但在现场可编程门阵列实现时资源消耗大,且要求计算点数为2的整数幂次。为此,采用平均分组,以更小FFT计算模块实现循环相关,完成C/A码捕获,即平均相关法,解决了资源消耗大和计算点数问题。通过使用硬件描述语言完成了平均相关法的FPGA实现,经过ModelSim和MATLAB仿真结果的比较,验证了平均相关法的正确性。
To implement circular correlation in the frequency domain, using Fast Fourier Transform （FFT） is a fast acquisition approach for GPS C/A code, while its FPGA implementation takes a large amount of resource, and the number of FFT operation needs to be 2 to the power of an integer. The paper proposes an approach called Averaging Correlation to fulfill circular correlation using smaller FFT blocks by averaging the input and local C/A code, which can solve the problems mentioned above. FPGA implementation of averaging correlation is achieved by the use of Hardware Description Language（HDL）. Comparison of the results of ModelSim functional simulation and MATLAB simulation verifies the validity of Averaging Correlation approach.
出处
《信息与电子工程》
2009年第1期1-3,8,共4页
information and electronic engineering
基金
国家自然科学基金
中国工程物理研究院联合基金资助项目(10676002)
关键词
快速傅里叶变换
循环相关
快速捕获
平均相关
硬件描述语言
Fast Fourier Transform
circular correlation
fast acquisition
Averaging Correlation
Hardware Description Language
