摘要
Highly arsenic-doped Si-on-insulator (SOI) substrate incorporated with buried MoSi2 layers is fabricated aiming at decreasing the collector series resistance of SiGe heterojunction bipolar transistors (HBTs) on SOI, thereby enhancing cutoff frequency (fT) performance and increasing the maximum value of fT (fTMAX ). The .fT performance at medium current is enhanced and current required for fT = 15 GHz is reduced by half The value of fTMAX is improved by 30%.
Highly arsenic-doped Si-on-insulator (SOI) substrate incorporated with buried MoSi2 layers is fabricated aiming at decreasing the collector series resistance of SiGe heterojunction bipolar transistors (HBTs) on SOI, thereby enhancing cutoff frequency (fT) performance and increasing the maximum value of fT (fTMAX ). The .fT performance at medium current is enhanced and current required for fT = 15 GHz is reduced by half The value of fTMAX is improved by 30%.
基金
Supported by the National Natural Science Foundation of China under Grant Nos 60476006 and 60576014, the Shanghai Major State Technology Programme under Grant No 055211001, the National High Technology Research and Development Programme of China under Grant No 2006AA03Z315, the Shanghai Rising Star Programme (07QH14017), and the Special Funds for Major State Basic Research Programme of China under Grant No 2006CB302706.