摘要
提出了一种二极管桥结构的采样保持器。理论分析和实验仿真结果表明，该采样保持器采样率达60MSPS，在0．6～5．0MHz输入信号频率范围内，其有效位数达到7．43～6．68位。利用这种二极管桥结构的电压差异，可以降低保持电容上的电压跌落率，提高精度和采样率。
A new sample-and-hold circuit based on diode bridge architecture was designed. Results from both theoretical analysis and experimental simulation show that the proposed S/H circuit has a sampling rate of 60 MHz with ENOB at 7. 43-6.68 bits for 0. 6-5.0 MHz sine signal input. In the proposed S/H amplifier, voltage drop-rate on hold capacitor can be reduced, and both sampling rate and accuracy can be improved by making use of voltage difference between diode bridges.
出处
《微电子学》
CAS
CSCD
北大核心
2007年第4期570-573,共4页
Microelectronics
基金
国家自然科学基金重大研究计划资助项目(90407001)
深圳市科技计划资助项目(200512)
关键词
采样保持器
二极管桥结构
采样率
有效位数
总谐波失真
Sample-and-hold amplifier
Diode bridge architecture
Sampling rate
ENOB
Total harmonic distortion
