摘要
本文介绍了一种应用FPGA器件完成高速数字传输的方法,利用这种方法实现无线收发芯片nRF2401A的高速数据接口。为进一步提高信息的传输速率,这里还对待传输的数据进行了压缩处理。涉及的高速数据接口和压缩处理算法都用VHDL实现,并通过实际测试。
A high speed data transmission method based on FPGA is introduced and employed to realize the high speed data interface of wireless transceiver chip （nRF2401A）. To further improve the transmission rate, the transmitted data is also compressed in the designed interface system. The high speed data interface and the corresponding data compressing algorithm are programmed using VHDL. The whole system has been tested, which shows the feasibility of the designing method based on FPGA.
出处
《微计算机信息》
北大核心
2007年第17期227-228,218,共3页
Control & Automation
基金
国家自然科学基金项目(60372036)
