摘要
提出了一种HVIC中高端浮动电路的新的实现方式,该方式采用单路LDMOS,实现了高压电平位移的功能。分析了该方式的电路结构和工作原理,以此为基础,设计了功率MOS栅驱动集成电路。在主要电学指标相近的情况下,与目前常用电路相比,版图面积减小了约20%。采用6μm CMOS-LDMOS工艺,通过Hspice进行仿真验证,证明该方式正确可行。
A new approach to implement high side circuit in HVIC is presented, which uses single LDMOS to implement high voltage level shifter. Based on the analysis of the circuit structure and operation principle, a power MOS-gate drive IC is designed. With major electrical characteristics similar to normal circuit at present, this approach reduces the area of layout by about 20%. Simulation with Hspice based on 6 μm CMOS-LDMOS technology indicates the feasibility of the approach.
出处
《微电子学》
CAS
CSCD
北大核心
2007年第2期250-254,共5页
Microelectronics
