摘要
本文着重分析了RSA算法的核心-模幂运算,提出了有利于硬件实现的改进算法,并利用中国剩余定理加快了RSA的解密及数字签名的运算速度。在此基础上,最终提出并设计了一种结构简单,运算速度较快的加密核。通过VerilogHDL模型的仿真验证了此加密核设计的正确性及可行性。
This paper mainly analyzes the core operation of RSA algorithm-modular power operation, proposes an ameliorative algorithm which makes for hardware realization, and improves the operation speed of RSA decryption and Digital Signature with the Chinese remainder theorem. Based on these, a new kind of encryption kernel has been proposed and designed with relative simple structure and fast operation speed. Furthermore, simulation with Verilog HDL model validates the feasibility of the new encryption kernel.
出处
《微计算机信息》
北大核心
2005年第12X期39-41,共3页
Control & Automation
