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AES中有限域运算的优化及算法高速实现 被引量:4

FPGA Optimization Implementation for AES Algorithm
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摘要 介绍有限域的概念及Rijndael算法的结构,详细分析了算法中基于加法、乘法的运算过程,为使运算更适合在FP-GA平台实线,可使用一些技巧达到优化目的。详细阐述了使用FPGA高速实现运算关键部分的设计思路。针对FPGA设计中对速度与面积两项指标的不同要求,给出了两种设计方案。最后,给出算法在FPGA实现方式下的性能比较。 An introduction to the concept of finite - field and the structure of Riindael algorithm is given in this paper. It includes a detailed and optimized analysis of addition and multiplication based on finite- field and presents an implementation of key circuit on FleA. Aiming at the different requirements for speed and area in FPGA, presents two kinds of designing scheme, At the end, the paper compares the implementation of Flea with other reference in performance.
出处 《微机发展》 2005年第12期15-17,21,共4页 Microcomputer Development
关键词 有限域运算 RIJNDAEL AES FPGA实现 finite - field arithmetic Rijndael AES FPGA implcmentation
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参考文献8

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二级参考文献7

共引文献4

同被引文献26

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