摘要
FFT算法是高速实时信号处理的关键算法之一,在数字EW接收机中有着广泛的应用前景。本文基于Xilinx公司的Vertex-IIPro系列FPGA,设计一种级联结构的1024点FFT处理器,采用基-4并行蝶算单元,能并行处理四路输入数据,极大地提高了FFT的处理速度。在系统时钟为100MHz时,完成1024点复数FFT运算仅需要2.56μs。
The Fast Fourier Transform(FFT) is one of the most important algorithms of radar real-time signal processing. A 1024-points FFT processor based on Xilinx Vertex-II Pro FPGA family is introduced. A radix-4 parallel butterflies arithmetic is designed. It processes 4 parallel data in 1 clock cycle. The 1024-point FFT processor can process frames of 18-bit complex samples at a rate of four output samples per 100MHz clock cycle, thus performing a 1024-point transform in approximately (2.56s.)