摘要
基于分裂基FFT(SRFFT)算法设计FIR数字滤波器,首先将输入信号经A/D转换成数字序列,运用重叠相加法将数字序列分段成固定长度的数据组,然后采用SRFFT算法对固定长度的数据组将时域的卷积运算转换为频域的复乘运算,再利用分裂基IFFT(SRIFFT)转换回时域,从而达到滤波的效果.基于SRFFT算法的FIR数字滤波器较其他FFT算法大量减少了复乘加运算量,提高了滤波效率.本文设计的滤波器是一个长度为400～500阶的可变FIR数字滤波器,输入信号为采样速率10 MHz的复数据,根据系统处理要求,采用2片高速浮点芯片ADSP21160构成多处理器并行系统来实现高速FIR数字滤波器的设计.
The paper design a FIR digital filter base on SRFFT arithmetic.First,the input signal is transformed digtal signal by A/D ,and the digtal signal is divided into fixed-length array use by way of overlap addition.And then the fixed-length array is transformed to the frequency-area from the time-area with SRFFT arithmetic,and is transformed back to the time-area with SRIFFT,thus we attain the result of filter.This FIR digital filter base on SRFFT arithmetic decreas mass the operate degrees of complex-multiply and complex-addition and improve the efficiency of the filter than any others FFT arithmetic.The filter of this article is a variable digtal filter that a length 400 to 500 ranks.The input singal is complex-data that the speed of sample is 10 MHz. According to the system processing request,the system adopts 2 slices of high speed floats chips ADSP21160 to constitute multi- processors of parallel system to realize the design of high-speed FIR digtal filter.
出处
《现代电子技术》
2005年第13期51-55,共5页
Modern Electronics Technique
