摘要
采用X射线光电子能谱(XPS)对比分析纯氧化锌陶瓷和氧化锌压敏电阻的界面特性.结果表明,纯氧化锌陶瓷晶粒平均尺寸小于10 μm,掺杂材料有利于ZnO晶粒均匀生长.界面上O/Zn原子数量比值等于2.58,但界面势垒不到10 mV,其体电阻率在2.36～47.97Ω·cm.价电子谱发现:室温下仅纯ZnO费米能级附近有载流子分布,这表明:压敏电阻界面有陷阱态,氧化锌压敏电阻界面电输运特性需用载流子陷阱对双肖特基势垒进行补充.
Analyzed were the characteristics of interface of both ZnO varistor and pure ZnO ceramic by X-ray photoelectron spectroscopy (XPS). Obtained results indicate that of the pure ZnO ceramics, average grain size is below 10 祄, the ratio of oxygan to zine 2.58, potential barrier formed in interface <10 mV, the resistivity 2.36 ~ 47.97 ·cm. The bulk trap state exists in interface of ZnO varistor, and the interfacial electronic transport of ZnO varistor can be interpreted by double Schottky barrier model with correction of carrier bulk trap state.
出处
《电子元件与材料》
CAS
CSCD
北大核心
2004年第8期22-23,50,共3页
Electronic Components And Materials
基金
"十五"预研项目(41323020202)
