摘要
目前,集成电路正向着高速集成度方向发展,但受到封装如DIP、TSOP、BGA等上寄生电感的作用,同步开关噪声影响越来越大。本文对一个简化的同步开关噪声电路模型进行了理论分析,从而得出通过调整开关上升时间等方法,可以有效降低地弹噪声,降低幅度可达到80％以上。
The present development trend of integrated circuit (IC) is towards higher speeds and densities.However, parasitic inductance induced by packaging, such as DIP, TSOP, BGA, etc., becomes a criticalfactor to simultaneous switching noise(SSN), A simplified circuit model is constructed and applied to analyzeSSN. This method of analysis enables one to identify effective means to reduce ground bounce by up to 80%,including adjustment of rise time.
出处
《电子与封装》
2004年第4期50-53,45,共5页
Electronics & Packaging
