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Design and Test of Multibus Adapter System on a Chip for Fault Tolerant Computer Systems

Design and Test of Multibus Adapter System on a Chip for Fault Tolerant Computer Systems
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摘要 In order to improve the system reliability and performance and to reduce the system cost, volume and weight, we have designed, fabricated and tested the multibus adapter system of a trimodular redundant fault tolerant computer system on a single chip of 5000 gate CMOS gate array. The design, fabrication and test of this single chip system will be discussed.. In order to improve the system reliability and performance and to reduce the system cost, volume and weight, we have designed, fabricated and tested the multibus adapter system of a trimodular redundant fault tolerant computer system on a single chip of 5000 gate CMOS gate array. The design, fabrication and test of this single chip system will be discussed..
出处 《Journal of Systems Engineering and Electronics》 SCIE EI CSCD 1992年第4期5-6,2,共3页 系统工程与电子技术(英文版)
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