In the field ofnanotechnology, quantum dot-cellular automata (QCA) is the promising archetype that can provide an alternative solution to conventional complementary metal oxide semiconductor (~MOS) circuit. QCA ha...In the field ofnanotechnology, quantum dot-cellular automata (QCA) is the promising archetype that can provide an alternative solution to conventional complementary metal oxide semiconductor (~MOS) circuit. QCA has high device density, high operating speed, and extremely low powex consumption. Reversible logic has widespread applications in QCA. Researchers have explored several designs of QCA-based reversible logic circuits, but still not much work has been reported on QCA-based reversible binary subtractors. The low power dissipation and high circuit density of QCA pledge the energy-efficient design of logic circuit at a nano-scale level. However, the necessity of too many logic gates and detrimental garbage outputs may limit the functionality of a QCA-based logic circuit. In this paper we describe the design and implementation of a DG gate in QCA. The universal nature of the DG gate has been established. The QCA building block of the DG gate is used to achieve new reversible binary subtractors. The proposed reversible subtractors have low quantum cost and garbage outputs compared to the existing reversible subtractors. The proposed circuits are designed and simulated using QCA Designer-2.0.3.展开更多
We present a new approach to the synthesis of quantum automata. In previous research, reversible quantum automata were designed from tabular specifications or state graphs, and minimum length codes, which lead to circ...We present a new approach to the synthesis of quantum automata. In previous research, reversible quantum automata were designed from tabular specifications or state graphs, and minimum length codes, which lead to circuits with Toffoli gates with high numbers of inputs and thus to high quantum costs. This paper is the first to present a method to synthesize Sequential Quantum Circuits directly from flowcharts. In this paper, we directly map flowcharts to reversible/quantum circuits, using only inverters, 2*2 Feynman gates and 3*3 Toffoli gates, and thus reducing quantum costs. Our method has been confirmed by experiments on several benchmarks of practical flowcharts.展开更多
Reversible logic has recently gained significant interest due to its inherent ability to reduce energy dissipation,which is the primary need for low-power digital circuits.One of the newest areas of relevant study is ...Reversible logic has recently gained significant interest due to its inherent ability to reduce energy dissipation,which is the primary need for low-power digital circuits.One of the newest areas of relevant study is reversible logic,which has applications in many areas,including nanotechnology,DNA computing,quantum computing,fault tolerance,and low-power complementary metal-oxide-semiconductor(CMOS).An electrical circuit is classified as reversible if it has an equal number of inputs and outputs,and a one-to-one relationship.A reversible circuit is conservative if the EXOR of the inputs and the EXOR of the outputs are equivalent.In addition,quantum-dot cellular automata(QCA)is one of the state-of-the-art approaches that can be used as an alternative to traditional technologies.Hence,we propose an efficient conservative gate with low power demand and high speed in this paper.First,we present a reversible gate called ANG(Ahmadpour Navimipour Gate).Then,two non-resistant QCA ANG and reversible fault-tolerant ANG structures are implemented in QCA technology.The suggested reversible gate is realized through the Miller algorithm.Subsequently,reversible fault-tolerant ANG is implemented by the 2DW clocking scheme.Furthermore,the power consumption of the suggested ANG is assessed under different energy ranges(0.5Ek,1.0Ek,and 1.5Ek).Simulations of the structures and analysis of their power consumption are performed using QCADesigner 2.0.03 and QCAPro software.The proposed gate shows great improvements compared to recent designs.展开更多
In today’s digital era, developing digital circuits is bounded by the research towards investigating various nano devices. This paper provides the design of compact Baugh-Wooley multiplier using reversible logic. Eve...In today’s digital era, developing digital circuits is bounded by the research towards investigating various nano devices. This paper provides the design of compact Baugh-Wooley multiplier using reversible logic. Even though various researches have been done for designing reversible multiplier, this work is the first in the literature to use Baugh-Wooley algorithm using reversible logic. In this work, a new 5 × 5 reversible multiplier cell is proposed which will be useful in designing Baugh-Wooley multiplier. The proposed single multiplier cell is able to perform addition of a 1 × 1 product with the sum and carry from the previous cell. This reversible multiplier cell is useful in building up regularity in the array multipliers. The Toffoli gate synthesis of the proposed reversible multiplier cell is also given.展开更多
文摘In the field ofnanotechnology, quantum dot-cellular automata (QCA) is the promising archetype that can provide an alternative solution to conventional complementary metal oxide semiconductor (~MOS) circuit. QCA has high device density, high operating speed, and extremely low powex consumption. Reversible logic has widespread applications in QCA. Researchers have explored several designs of QCA-based reversible logic circuits, but still not much work has been reported on QCA-based reversible binary subtractors. The low power dissipation and high circuit density of QCA pledge the energy-efficient design of logic circuit at a nano-scale level. However, the necessity of too many logic gates and detrimental garbage outputs may limit the functionality of a QCA-based logic circuit. In this paper we describe the design and implementation of a DG gate in QCA. The universal nature of the DG gate has been established. The QCA building block of the DG gate is used to achieve new reversible binary subtractors. The proposed reversible subtractors have low quantum cost and garbage outputs compared to the existing reversible subtractors. The proposed circuits are designed and simulated using QCA Designer-2.0.3.
文摘We present a new approach to the synthesis of quantum automata. In previous research, reversible quantum automata were designed from tabular specifications or state graphs, and minimum length codes, which lead to circuits with Toffoli gates with high numbers of inputs and thus to high quantum costs. This paper is the first to present a method to synthesize Sequential Quantum Circuits directly from flowcharts. In this paper, we directly map flowcharts to reversible/quantum circuits, using only inverters, 2*2 Feynman gates and 3*3 Toffoli gates, and thus reducing quantum costs. Our method has been confirmed by experiments on several benchmarks of practical flowcharts.
文摘Reversible logic has recently gained significant interest due to its inherent ability to reduce energy dissipation,which is the primary need for low-power digital circuits.One of the newest areas of relevant study is reversible logic,which has applications in many areas,including nanotechnology,DNA computing,quantum computing,fault tolerance,and low-power complementary metal-oxide-semiconductor(CMOS).An electrical circuit is classified as reversible if it has an equal number of inputs and outputs,and a one-to-one relationship.A reversible circuit is conservative if the EXOR of the inputs and the EXOR of the outputs are equivalent.In addition,quantum-dot cellular automata(QCA)is one of the state-of-the-art approaches that can be used as an alternative to traditional technologies.Hence,we propose an efficient conservative gate with low power demand and high speed in this paper.First,we present a reversible gate called ANG(Ahmadpour Navimipour Gate).Then,two non-resistant QCA ANG and reversible fault-tolerant ANG structures are implemented in QCA technology.The suggested reversible gate is realized through the Miller algorithm.Subsequently,reversible fault-tolerant ANG is implemented by the 2DW clocking scheme.Furthermore,the power consumption of the suggested ANG is assessed under different energy ranges(0.5Ek,1.0Ek,and 1.5Ek).Simulations of the structures and analysis of their power consumption are performed using QCADesigner 2.0.03 and QCAPro software.The proposed gate shows great improvements compared to recent designs.
文摘In today’s digital era, developing digital circuits is bounded by the research towards investigating various nano devices. This paper provides the design of compact Baugh-Wooley multiplier using reversible logic. Even though various researches have been done for designing reversible multiplier, this work is the first in the literature to use Baugh-Wooley algorithm using reversible logic. In this work, a new 5 × 5 reversible multiplier cell is proposed which will be useful in designing Baugh-Wooley multiplier. The proposed single multiplier cell is able to perform addition of a 1 × 1 product with the sum and carry from the previous cell. This reversible multiplier cell is useful in building up regularity in the array multipliers. The Toffoli gate synthesis of the proposed reversible multiplier cell is also given.