The Manchester dataflow computer is a famous dynamic dataflow computer.It is centralized in architecture and simple in organization. Its overhead for communication and scheduling is very small. Its efficiency comes do...The Manchester dataflow computer is a famous dynamic dataflow computer.It is centralized in architecture and simple in organization. Its overhead for communication and scheduling is very small. Its efficiency comes down, when processing elements in the processing subsystem increaJse. Several articles eval uated its performance and presented improved methods. The authors studied its processing subsystem and carried out the simulation. The simulation rer sults show that the efficiency of the processing subsystem drops dramatically when average instruction execution microcycles become less and the maximum instruction execution rate is nearly attained. Two improved methods are pre-sented to overcome the disadvantage. The improved processing subsystem with a cheap distributor made up of a bus and a twthlevel fixed priority circuit pos-sesses almost full efficiency no matter whether the average instruction execution microcycles number is large or small and even if the mtalmum instruction execution rate is approached.展开更多
基金supported by National Natural Science Foundation of China(31301080)China Postdoctoral Science Foundation Project(2015M582122,2016T90644)+2 种基金National Key Technology Support Program of China(2015BAF13B00)Natural Science Foundation of Shandong Province(ZR2015FL001)the Open Project of State Key Laboratory of Crop Biology(2013KF10)
文摘The Manchester dataflow computer is a famous dynamic dataflow computer.It is centralized in architecture and simple in organization. Its overhead for communication and scheduling is very small. Its efficiency comes down, when processing elements in the processing subsystem increaJse. Several articles eval uated its performance and presented improved methods. The authors studied its processing subsystem and carried out the simulation. The simulation rer sults show that the efficiency of the processing subsystem drops dramatically when average instruction execution microcycles become less and the maximum instruction execution rate is nearly attained. Two improved methods are pre-sented to overcome the disadvantage. The improved processing subsystem with a cheap distributor made up of a bus and a twthlevel fixed priority circuit pos-sesses almost full efficiency no matter whether the average instruction execution microcycles number is large or small and even if the mtalmum instruction execution rate is approached.
