s:A divide- by- 12 8/ 12 9or6 4/ 6 5 dual- modulus prescaler based on new optimized structure and dynam ic circuit technique im plem ented in 0 .2 5 μm CMOS digital technology is described.New optimized structure re...s:A divide- by- 12 8/ 12 9or6 4/ 6 5 dual- modulus prescaler based on new optimized structure and dynam ic circuit technique im plem ented in 0 .2 5 μm CMOS digital technology is described.New optimized structure reduces the propagation delay and has higher operating speed.Based on this structure,an im proved D- flip- flop(DFF) using dynam ic circuit technique is proposed.A prototype is fabricated and the measured results show that this prescaler works well in gigahertz frequency range and consumes only35 m W(including three power- hungry output buffers) when the input frequency is2 .5 GHz and the power supply voltage is2 .5 V.Due to its excellent perform ance,the prescaler could be applied to many RF system s.展开更多
An 1∶8 frequency divider is designed and realized in a 0 35μm standard CMOS technology.The chip consists of three stages of 1∶2 divider cells,which are constructed with source couple logic (SCL) flip flops.By rev...An 1∶8 frequency divider is designed and realized in a 0 35μm standard CMOS technology.The chip consists of three stages of 1∶2 divider cells,which are constructed with source couple logic (SCL) flip flops.By revising the traditional topology of SCL flip flop,a divider with better performances is got.The results of measurement show that the whole chip achieves the frequency division at more than 8 5GHz.Each 1∶2 divider consumes about 11mW from a 3 3V supply.The divider can be used in RF and optic fiber transceivers and other high speed systems.展开更多
The correlation of surface impurity states with the antiferromagnetic ground states is crucial for understanding the formation of the topological surface state in the antiferromagnetic topological insulators MnBi_(2)T...The correlation of surface impurity states with the antiferromagnetic ground states is crucial for understanding the formation of the topological surface state in the antiferromagnetic topological insulators MnBi_(2)Te_(4).By using low-temperature scanning tunneling microscopy and spectroscopy,we observed a localized bound state around the Mn-Bi antisite defect at the Teterminated surface of the antiferromagnetic topological insulator MnBi_(2)Te_(4).When applying a magnetic field perpendicular to the surface(Bz)from–1.5 to 3.0 T,the bound state shifts linearly to a lower energy with increasing Bz,which is attributed to the Zeeman effect.Remarkably,when applying a large range of Bz from–8.0 to 8.0 T,the magnetic field induced reorientation of surface magnetic moments results in an abrupt jump in the local density of states(LDOS),which is characterized by LDOSchange-ratio■quantitatively.Interestingly,two asymmetric critical field,–2.0 and 4.0 T determined by the two peaks in■are observed,which is consistent with simulated results according to a Mills-model,describing a surface spin flop transition(SSF).Our results provide a new flatform for studying the interplay between magnetic order and topological phases in magnetic topological materials.展开更多
Digital design of a digital signal processor involves accurate and high-speed mathematical computation units.DSP units are one of the most power consuming and memory occupying devices.Multipliers are the common buildi...Digital design of a digital signal processor involves accurate and high-speed mathematical computation units.DSP units are one of the most power consuming and memory occupying devices.Multipliers are the common building blocks in most of the DSP units which demands low power and area constraints in the field of portable biomedical devices.This research works attempts multiple power reduction technique to limit the power dissipation of the proposed LUT multiplier unit.A lookup table-based multiplier has the advantage of almost constant area requirement’s irrespective to the increase in bit size of multiplier.Clock gating is usually used to reduce the unnecessary switching activities in idle circlet components.A clock tree structure is employed to enhance the SRAM based lookup table memory architecture.The LUT memory access operation is sequential in nature and instead of address decoder a ring counter is used to scan the memory contents and gated driver tree structure is implemented to control the clock and data switching activities.The proposed algorithm yields 20%of power reduction than existing.展开更多
A novel general purpose sense amplifier based flip flop is proposed.Compared to other flip flops,the proposed flip flop has faster operating speed under the approximately same power consumption,and needs fewer tr...A novel general purpose sense amplifier based flip flop is proposed.Compared to other flip flops,the proposed flip flop has faster operating speed under the approximately same power consumption,and needs fewer transistors and consumes smaller area.Moreover,it eliminates the glitch problem.By using pseudo PMOS dynamic technique,its performance is further improved.展开更多
This is a survey paper about a selection of results in complex algebraic geometry that appeared in the recent and less recent litterature,and in which rational homogeneous spaces play a prominent role.This selection i...This is a survey paper about a selection of results in complex algebraic geometry that appeared in the recent and less recent litterature,and in which rational homogeneous spaces play a prominent role.This selection is largely arbitrary and mainly refiects the interests of the author.展开更多
This paper presents a new class of semiconductor integrated sensor which consists of sensitive components and flip flop circuit. The sensors have high sensitivity and digital output. This paper describes the operatin...This paper presents a new class of semiconductor integrated sensor which consists of sensitive components and flip flop circuit. The sensors have high sensitivity and digital output. This paper describes the operating principle and structure of the sensor. And noise effect on characteristics of the sensor is analysed in detail. The modulated effect of the triangular wave voltage is quantified. As an example, an integrated pressure sensor is introduced and the experimental results agree with the theoretical analyses.展开更多
文摘s:A divide- by- 12 8/ 12 9or6 4/ 6 5 dual- modulus prescaler based on new optimized structure and dynam ic circuit technique im plem ented in 0 .2 5 μm CMOS digital technology is described.New optimized structure reduces the propagation delay and has higher operating speed.Based on this structure,an im proved D- flip- flop(DFF) using dynam ic circuit technique is proposed.A prototype is fabricated and the measured results show that this prescaler works well in gigahertz frequency range and consumes only35 m W(including three power- hungry output buffers) when the input frequency is2 .5 GHz and the power supply voltage is2 .5 V.Due to its excellent perform ance,the prescaler could be applied to many RF system s.
文摘An 1∶8 frequency divider is designed and realized in a 0 35μm standard CMOS technology.The chip consists of three stages of 1∶2 divider cells,which are constructed with source couple logic (SCL) flip flops.By revising the traditional topology of SCL flip flop,a divider with better performances is got.The results of measurement show that the whole chip achieves the frequency division at more than 8 5GHz.Each 1∶2 divider consumes about 11mW from a 3 3V supply.The divider can be used in RF and optic fiber transceivers and other high speed systems.
基金This work is supported by the National Natural Science Foundation of China(Nos.61888102 and 52022105)National Key Research and Development Projects of China(Nos.2018YFA0305800 and 2019YFA0308500)+2 种基金the Strategic Priority Research Program of Chinese Academy of Sciences(Nos.XDB30000000 and XDB28000000)CAS Project for Young Scientists in Basic Research(No.YSBR-003)the University of Chinese Academy of Sciences.
文摘The correlation of surface impurity states with the antiferromagnetic ground states is crucial for understanding the formation of the topological surface state in the antiferromagnetic topological insulators MnBi_(2)Te_(4).By using low-temperature scanning tunneling microscopy and spectroscopy,we observed a localized bound state around the Mn-Bi antisite defect at the Teterminated surface of the antiferromagnetic topological insulator MnBi_(2)Te_(4).When applying a magnetic field perpendicular to the surface(Bz)from–1.5 to 3.0 T,the bound state shifts linearly to a lower energy with increasing Bz,which is attributed to the Zeeman effect.Remarkably,when applying a large range of Bz from–8.0 to 8.0 T,the magnetic field induced reorientation of surface magnetic moments results in an abrupt jump in the local density of states(LDOS),which is characterized by LDOSchange-ratio■quantitatively.Interestingly,two asymmetric critical field,–2.0 and 4.0 T determined by the two peaks in■are observed,which is consistent with simulated results according to a Mills-model,describing a surface spin flop transition(SSF).Our results provide a new flatform for studying the interplay between magnetic order and topological phases in magnetic topological materials.
文摘Digital design of a digital signal processor involves accurate and high-speed mathematical computation units.DSP units are one of the most power consuming and memory occupying devices.Multipliers are the common building blocks in most of the DSP units which demands low power and area constraints in the field of portable biomedical devices.This research works attempts multiple power reduction technique to limit the power dissipation of the proposed LUT multiplier unit.A lookup table-based multiplier has the advantage of almost constant area requirement’s irrespective to the increase in bit size of multiplier.Clock gating is usually used to reduce the unnecessary switching activities in idle circlet components.A clock tree structure is employed to enhance the SRAM based lookup table memory architecture.The LUT memory access operation is sequential in nature and instead of address decoder a ring counter is used to scan the memory contents and gated driver tree structure is implemented to control the clock and data switching activities.The proposed algorithm yields 20%of power reduction than existing.
文摘A novel general purpose sense amplifier based flip flop is proposed.Compared to other flip flops,the proposed flip flop has faster operating speed under the approximately same power consumption,and needs fewer transistors and consumes smaller area.Moreover,it eliminates the glitch problem.By using pseudo PMOS dynamic technique,its performance is further improved.
文摘This is a survey paper about a selection of results in complex algebraic geometry that appeared in the recent and less recent litterature,and in which rational homogeneous spaces play a prominent role.This selection is largely arbitrary and mainly refiects the interests of the author.
文摘This paper presents a new class of semiconductor integrated sensor which consists of sensitive components and flip flop circuit. The sensors have high sensitivity and digital output. This paper describes the operating principle and structure of the sensor. And noise effect on characteristics of the sensor is analysed in detail. The modulated effect of the triangular wave voltage is quantified. As an example, an integrated pressure sensor is introduced and the experimental results agree with the theoretical analyses.
