This study examines the impact of farmers’cooperatives participation and technology adoption on their economic welfare in China.A double selectivity model(DSM)is applied to correct for sample selection bias stemming ...This study examines the impact of farmers’cooperatives participation and technology adoption on their economic welfare in China.A double selectivity model(DSM)is applied to correct for sample selection bias stemming from both observed and unobserved factors,and a propensity score matching(PSM)method is applied to calculate the agricultural income difference with counter factual analysis using survey data from 396 farmers in 15 provinces in China.The findings indicate that farmers who join farmer cooperatives and adopt agricultural technology can increase agricultural income by 2.77 and 2.35%,respectively,compared with those non-participants and non-adopters.Interestingly,the effect on agricultural income is found to be more significant for the low-income farmers than the high-income ones,with income increasing 5.45 and 4.51%when participating in farmer cooperatives and adopting agricultural technology,respectively.Our findings highlight the positive role of farmer cooperatives and agricultural technology in promoting farmers’economic welfare.Based on the findings,government policy implications are also discussed.展开更多
This paper presents a low-power high-quality CMOS image sensor(CIS)using 1.5 V 4T pinned photodiode(4T-PPD)and dual correlated double sampling(dual-CDS)column-parallel single-slope ADC.A five-finger shaped pixel layer...This paper presents a low-power high-quality CMOS image sensor(CIS)using 1.5 V 4T pinned photodiode(4T-PPD)and dual correlated double sampling(dual-CDS)column-parallel single-slope ADC.A five-finger shaped pixel layer is proposed to solve image lag caused by low-voltage 4T-PPD.Dual-CDS is used to reduce random noise and the nonuniformity between columns.Dual-mode counting method is proposed to improve circuit robustness.A prototype sensor was fabricated using a 0.11μm CMOS process.Measurement results show that the lag of the five-finger shaped pixel is reduced by 80%compared with the conventional rectangular pixel,the chip power consumption is only 36 mW,the dynamic range is 67.3 dB,the random noise is only 1.55 e^(-)_(rms),and the figure-of-merit is only 1.98 e^(-)·nJ,thus realizing low-power and high-quality imaging.展开更多
A single Complementary Metal Oxide Semiconductor (CMOS) image sensor based on 0.35μm process along with its design and implementation is introduced in this paper. The pixel ar-chitecture of Active Pixel Sensor (APS) ...A single Complementary Metal Oxide Semiconductor (CMOS) image sensor based on 0.35μm process along with its design and implementation is introduced in this paper. The pixel ar-chitecture of Active Pixel Sensor (APS) is used in the chip,which comprises a 256×256 pixel array together with column amplifiers,scan array circuits,series interface,control logic and Analog-Digital Converter (ADC). With the use of smart layout design,fill factor of pixel cell is 43%. Moreover,a new method of Dynamic Digital Double Sample (DDDS) which removes Fixed Pattern Noise (FPN) is used. The CMOS image sensor chip is implemented based on the 0.35μm process of chartered by Multi-Project Wafer (MPW). This chip performs well as expected.展开更多
基金the Special Project of Major Theoretical Research and Interpretation of Philosophy and Social Sciences of Chongqing Municipal Education Commission,China(19SKZDZX15)the Key Project of Humanities and Social Sciences Research of Chongqing Education Commission,China(18SKSJ003)the Funding for Cultivating Major Projects in Humanities and Social Sciences of Southwest University,China(SWU1809009)。
文摘This study examines the impact of farmers’cooperatives participation and technology adoption on their economic welfare in China.A double selectivity model(DSM)is applied to correct for sample selection bias stemming from both observed and unobserved factors,and a propensity score matching(PSM)method is applied to calculate the agricultural income difference with counter factual analysis using survey data from 396 farmers in 15 provinces in China.The findings indicate that farmers who join farmer cooperatives and adopt agricultural technology can increase agricultural income by 2.77 and 2.35%,respectively,compared with those non-participants and non-adopters.Interestingly,the effect on agricultural income is found to be more significant for the low-income farmers than the high-income ones,with income increasing 5.45 and 4.51%when participating in farmer cooperatives and adopting agricultural technology,respectively.Our findings highlight the positive role of farmer cooperatives and agricultural technology in promoting farmers’economic welfare.Based on the findings,government policy implications are also discussed.
基金supported by the National Key R&D Program of China(2019YFB2204304).
文摘This paper presents a low-power high-quality CMOS image sensor(CIS)using 1.5 V 4T pinned photodiode(4T-PPD)and dual correlated double sampling(dual-CDS)column-parallel single-slope ADC.A five-finger shaped pixel layer is proposed to solve image lag caused by low-voltage 4T-PPD.Dual-CDS is used to reduce random noise and the nonuniformity between columns.Dual-mode counting method is proposed to improve circuit robustness.A prototype sensor was fabricated using a 0.11μm CMOS process.Measurement results show that the lag of the five-finger shaped pixel is reduced by 80%compared with the conventional rectangular pixel,the chip power consumption is only 36 mW,the dynamic range is 67.3 dB,the random noise is only 1.55 e^(-)_(rms),and the figure-of-merit is only 1.98 e^(-)·nJ,thus realizing low-power and high-quality imaging.
文摘A single Complementary Metal Oxide Semiconductor (CMOS) image sensor based on 0.35μm process along with its design and implementation is introduced in this paper. The pixel ar-chitecture of Active Pixel Sensor (APS) is used in the chip,which comprises a 256×256 pixel array together with column amplifiers,scan array circuits,series interface,control logic and Analog-Digital Converter (ADC). With the use of smart layout design,fill factor of pixel cell is 43%. Moreover,a new method of Dynamic Digital Double Sample (DDDS) which removes Fixed Pattern Noise (FPN) is used. The CMOS image sensor chip is implemented based on the 0.35μm process of chartered by Multi-Project Wafer (MPW). This chip performs well as expected.
